This invention is generally concerned with the formation of an insulating layer on the substrate of a silicon semiconductor wafer in order to electrically isolate the various semiconductor devices manufactured thereon, and is specifically concerned with a process which forms a tub-like insulating layer around an epitaxial island of silicon which may then be used to form a semiconductor device on the wafer.
Processes for forming insulating layers on semiconductor substrates for purposes of electrical isolation are known in the prior art. For example, in the SOS (silicon on sapphire) process, the entire silicon substrate is grown over a single crystal of insulating sapphire. While the sapphire layer has been shown to be effective in insulating individual transistors or other devices formed on the layer of silicon grown over the sapphire, there are unfortunately several shortcomings associated with the resulting device. For example, because the insulating layer of sapphire isolates not only the regions around each of the transistors, but also the regions beneath each of these transistors, it is difficult if not impossible to employ the well-known technique of back channel biasing in the resulting structure. Such biasing is useful in preventing back channel current leakage through the transistors that is caused by charge accumulation at the silicon-sapphire interface from radiation or other causes. Additionally, because the crystal structure of sapphire is different from silicon, lattice mismatch occurs in the interface between the sapphire and the silicon grown over it which in turn impairs the quality of the resulting epitaxially grown silicon. Other shortcomings include the high cost of providing the sapphire crystal, as well as the brittle nature of sapphire, which may cause it to crack when subjected to mechanical or thermal stresses.
In response to the shortcomings of the SOS process, the SIMOX (separation by implantation of oxygen) process was developed. In this process, high voltage high current ion implantation is used to implant oxygen ions at a selected depth within a silicon substrate. The resulting substrate is annealed to cause the oxygen atoms to react with silicon to create an internal, insulating layer of silicon dioxide. Because the insulating layer is thin relative to the insulating layer of sapphire used in the SOS process, back channel biasing may be used in connection with the transistors formed on the silicon film. However, other shortcomings are present. For example, the integrity of the crystalline structure of the silicon above the implant layer is marred by the passage of high energy oxygen ions through it. Such marring of the crystallinity of the silicon can jeopardize the performance of the transistors or other semiconductor devices that are ultimately fabricated upon this layer. Additionally, the necessity of using a high current ion implanter renders this process relatively expensive.
As an alternative to the SIMOX process, the FIPOS (full isolation by porous silicon) process may be used to form insulating layers around the semiconductor devices ultimately fabricated on the silicon substrate. In this process, impurity diffusion or ion implantation is used to form a doped layer in the silicon substrate. After this, a layer of undoped epitaxial silicon is grown over the doped layer of silicon. Next, trenches are etched into the outer layer of silicon to define islands of undoped silicon over the doped region of silicon where transistors or other semiconductor devices will be fabricated. The resulting substrate is then anodized by subjecting it to a positive potential while it is immersed in an aqueous solution of hydrogen fluoride. Because the doped region of the silicon substrate reacts with the ions in the hydrogen fluoride solution, the silicon in the doped layer becomes partially dissolved, such that a porous layer of silicon is created beneath every island of undoped silicon in the substrate. This porous layer is converted to silicon dioxide by way of thermal oxidation, and the silicon dioxide-lined trenches that are disposed between the silicon islands are then filled with a silicon oxide for planarization purposes. Unfortunately, this process produces a substrate which is apt to warp or curl as a result of thermal stresses. Additionally, the trench-filling step required for planarization is a slow and expensive step to implement.
Clearly, what is needed is a process that is capable of individually surrounding each semiconductor site with a layer of insulating material without marring the quality of the silicon used to fabricate the transistor or other semiconductor device. Ideally, such a process should be low cost and simple, and not require a trench filling step, and should produce a silicon substrate which is not apt to warp or curl when subjected to thermal oxidation or other heat treatment.